The present disclosure relates in general to data communication between integrated circuits and more particularly to a bi-directional interface circuit having switchable current-source bias.
One common method of transferring data between semiconductor chips is referred to as single-ended signaling, in which an entire data signal may be transmitted via a single wire between two interfaces, one on each of two chips. By driving the voltage on this wire either high or low relative to a reference voltage, digital data is transmitted. Although single-ended signaling is relatively simple to implement, it is susceptible to interference and noise. Typically, a number of wires are connected in parallel in order to transmit multiple bits of data simultaneously between semiconductor chips and between various electrical devices. Consequently, data being transmitted over a specific wire can produce “crosstalk” interference with data being transmitted on other wires. Electromagnetic interference (EMI) can also cause data to become corrupted in single-ended systems. Furthermore, each time the signal transitions from a high voltage to a low voltage and vice versa, a small amount of noise is generated on the transmitting chip's internal power supply grid. In some systems with upwards of thirty-two or more wires acting in parallel on an electrical bus interconnect, continuously transmitting data, this simultaneous switching output (SSO) noise becomes a performance limiting factor. Further complicating matters, the effects of capacitive and inductive parasitics inherent to the electrical interconnect limit the rate or “frequency” by which data can be transmitted across that interconnect. Beyond a certain frequency, the signal becomes attenuated (e.g., weaker), which makes the signal even more susceptible to becoming corrupted by interference and noise.
In response to these and other issues associated with the single-ended signaling at high data rates, designers typically utilize differential signaling for high performance applications. With differential signaling, a pair of wires is used to carry an electrical signal. Unlike in single-ended signaling, in which the binary “one” and “zero” information is communicated with voltages relative to fixed DC references (such as the circuits power supply voltages, commonly called “VDD” and “ground”), in differential signaling it is the difference of the voltages on the wires themselves which conveys the information—e.g., when the voltage on a “positive” side of the pair of wires is larger than a “negative” side, a logical “one” is being transmitted; when the “negative” side has a higher electrical potential than the “positive” side, a logical “zero” is being transmitted. As a result of differential signaling, much of the interference and noise created by the signaling is experienced by both wires, and so is effectively cancelled out. Thus, differential signaling has the benefit of greatly reducing the effects from most sources of common-mode interference and noise. Consequently, data can be more easily transmitted at very high data rates using a differential signaling scheme. This benefit does of course not come for free: differential signaling schemes implicitly require twice as many wires and pins to carry the same number of signals as compared to single-ended signaling schemes.
In some applications in which device pin count is an important economic metric, such as in very high performance memory interconnect, a differential signal pair is used “bi-directionally”; that is, the same pair wires are used for transmitting data in both directions. For example, in a high performance memory system including a memory chip and a memory controller, during a read operation, the memory chip transmits data over the differential pair of wires to the memory controller. During a write operation, on the other hand, the memory controller transmits data over the same differential pair of wires to the memory controller. The memory controller is typically responsible for handling the command and control signals required so that both chips on both sides of the electrical channel use the bi-directionality in concert with each other. For example, when one side of the electrical channel is in a “transmit state”, the opposite sides needs to be in a “receive state”.
Changing a bi-directional circuit interface from being in a “transmit state” to a “receive state”; however, creates some of the same problems previously known to single-ended signaling. For example, when a differential transmitter is activated (e.g., during the transition from a “receive” state to a “transmit” state), a current-source bias circuit is typically enabled. Turning on such a current-source bias circuit associated with the differential transmitter actually creates on-chip and in-system noise very similar to single-ended noise. Noise is also generated when the current-source bias is turned off (e.g., during the transition from a “transmit” to a “receive” state). And as with single-ended transmission systems, this noise can cause errors in data transmission. In order to prevent this type of errors from occurring, one solution has been to deliberately introduce bus-turnaround delays or “bubbles” immediately following transmit and receive state transitions. During the delay, no data is transmitted over the differential interconnect. This gives time for the noise (generated due to state transition) to eventually settle out. Although these delays maintain data integrity, they decrease the transmit efficiency because data is not being transmitted during these delays. For very high data rates, the “dead time” imposed by these bus-turnaround delays translates into diminished utilization of the available bandwidth. Thus, bi-directional differential signaling has yet to reach its fullest potential.